Analysis of wiring technology for LED flip chip design (on)

This article describes a way to complete the rewiring layer routing on a pseudo-single layer. These techniques turn the wiring problem of the rewiring layer into a typical channel routing problem.

With this method, 100% throughput can be achieved and the area of ​​the two-layer wiring can be minimized.

Engineers often use rewiring layers (RDL) to redistribute I/O pads to bump pads in flip-chip designs, and the entire process does not change the I/O pad layout.

However, conventional routing capabilities may not be sufficient to handle large-scale designs because the rewiring layers may be very crowded in these designs, especially if I/O bump allocation methods that are not optimized are used. In this case, even with manual wiring, it is impossible to complete all the wiring in one layer.

As more input/output (I/O) requirements increase, traditional wire-bound packages will not effectively support thousands of I/Os. Flip-chip assembly technology is widely used to replace wire bonding technology because it not only reduces chip area, but also supports much more I/O.

Flip-chips also greatly reduce the inductance to support high-speed signals and have better thermal conductivity. Flip-chip ball grid arrays (FCBGA) are also increasingly used for high I/O count chips.

Figure 1: Flip-chip cross-section: The signal lines pass through three faces, including the rewiring layer.

The Rewiring Layer (RDL) is the interface between the chip and the package in the flip chip assembly (Figure 1). The rewiring layer is an additional metal layer consisting of core metal top traces that are used to bond the die's I/O pads outward to other locations such as bump pads.

The bumps are usually arranged in a grid pattern, and each bump is cast with two pads (one at the top and one at the bottom) which are connected to the rewiring layer and the package substrate, respectively. Therefore, the rewiring layer is used as a layer connecting the I/O pads and the bump pads.

Figure 2: Free allocation (FA) and pre-allocation (PA) are two methods of pad assignment. Peripheral I/O (PI/O) and Area I/O (AI/O) are two flip-chip structures.

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