Design of Intelligent Video Monitor Based on BF561

The traditional monitoring system requires security personnel to monitor the picture in real time or play back the video record for manual analysis, which is not only costly but also inefficient. At present, many video surveillance systems are only networked, and due to the limitation of network bandwidth, data delay or loss also brings great risks to the monitoring system. In view of the above problems, this paper designs and implements an intelligent video monitor based on BF561, which can seamlessly connect with the existing monitoring system to achieve automatic monitoring and tracking of targets, and effectively improve the monitoring efficiency.
1 system hardware framework structure <br> Because in the real-time video processing system, the underlying algorithm has a large amount of data, the computing structure is relatively simple, and has a high speed requirement. The high-level processing algorithm control structure is complex, the amount of data is less than the underlying algorithm, so this paper uses the structure of FPGA + DSP, the hardware framework of the system is shown in Figure 1. This design uses ADI's embedded multimedia processor BF561 (BlackFin561) as the algorithm processing and control core, using EP3C25F324C8 to image preprocessing and image background extraction and other algorithms. The BF561 has two 600 MHz DSP cores, each providing two sets of multipliers and ALUs, dedicated video processing hardware units and video processing instructions, rich DMA channels and high-capacity high-speed SRAM. The BF561 uses the MSA structure and can be used as a RISC processor or as a DSP [1].

This article refers to the address: http://

1.1 Video Acquisition and Output Module This article uses the decoding chip SAA7111 to convert the PAL signal output by the camera into a digital signal. The SAA7111 is a 9-bit video decoder from Philips that offers 6 analog inputs and 2 enhanced analog-to-digital converters. The SAA7111 is configured to convert the PAL analog baseband signal into the ITU-R BT656 4:2:2 format YUV signal and send it to the FPGA for preprocessing. The preprocessed image data is then repackaged by the FPGA into BT656 format data and sent to the PPI port of the BF561. The specific connection diagram is shown in Figure 2. In the figure, VPD[0..7] is the data output pin connected to the FPGA, and the clock synchronization signal BF561 uses MDMA to store the original image signal in the SDRAM for use by the video tracking algorithm. The video output module uses the Philips video encoding chip SAA7105 to convert the output signal into a PAL CVBS signal. The standard YUV data is output from the FPGA pin and sent to the data pin of the SAA7105. The field, horizontal and vertical sync signals are connected to the control pins of the FPGA. The parameter configuration of the SAA7105 is implemented by the FPGA generating the I ² C bus.

1.2 Memory Module The on-chip memory of the BF561 is divided into two parts: each core uses 100 KB of dedicated, high-speed L1 memory and 128 KB of large-capacity shared L2 memory. The system expands both SDRAM and Flash memory through the EBIU interface. Two pieces of MT48L32M16A2 are selected to form the SDRAM memory. The intermediate image of the μClinux operating system, image processing data and image processing can be stored in the SDRAM. The system expands 64 MB of Flash, and uses the S29GL064M90T chip to store the operating system's bootloader and kernel programs.
1.3 Peripheral Interface Module Peripheral interface modules include serial interface, Ethernet interface and some common interfaces. This article mainly uses the serial interface and Ethernet interface. The function of the serial port interface is to control the movement of the gimbal, so that the moving target can be in the field of view at any time. This article selects the MAX488 chip to realize the level conversion of the UART interface in the BF561; the function of the network interface is to realize the intelligence through the embedded web server of the system. Remote configuration of the monitor, transmission monitoring parameters, etc., can meet the system needs with DM9000.
1.4 DSP dual core and FPGA communication In this system, it involves the communication between the two cores of BF561 and the communication between BF561 and FPGA. The FPGA provides image data to the DSP and binarized image data after background extraction. The DSP transmits the mapped gate data to the FPGA, and the FPGA superimposes the gate to the original image and sends it to the SAA7105H for display. Common dual-core communication mainly adopts two communication modes: interrupt and polling [2]. Interrupt is to use two core interrupt mechanism to achieve communication between FPGA and DSP; polling is to set up some semaphores in dual-core shared registers for dual-core communication and access. Considering the application conditions of the system, this paper uses the polling communication method to store the semaphore definition in the L2 space. The address space of the asynchronous memory of the DSP is mapped to the FPGA, and the data interaction between the FPGA and the DSP can be completed by operating the data line and the address line through the FPGA.
2 Software algorithm implementation <br> In this design, the A core runs the μClinux operating system, and the B core runs the video monitoring algorithm. The μClinux operating system mainly implements the driver of the Ethernet chip DM9000, the driver of the Flash, the implementation of the embedded Web server BOA, and the driver of the B core.
2.1 Algorithms <br> The intelligent video analyzer implemented in this paper is mainly used in video surveillance. One of the core contents of intelligent video surveillance is to automatically track specific targets. Target tracking is divided into three main steps: moving target detection, behavior recognition and target tracking.
The moving target detection is to extract the changed area from the background image from the image sequence. This paper adopts the most commonly used motion detection algorithm, namely background elimination method. This part of the algorithm is mainly implemented in FPGA, and the background image is obtained by the background modeling method based on the improved adaptive hybrid Gaussian model [3]. In order to save storage space and increase the speed of operation, the YUV signal is converted into the gray value of the image during background modeling. After obtaining the background image B and the original image A by Gaussian modeling, in order to overcome interference such as branch disturbance and sunlight reflection, the following strategies are adopted:

Then, the binary image C is processed by the mathematical morphology method to obtain the connected domain of the moving target, thereby further obtaining the centroid, size, position and other information of the moving target, and establishing the target chain.
Behavior recognition: traverse each target of the target chain, determine the direction and distance of the centroid displacement of the moving target between successive frames, and obtain the motion trajectory of the target. According to the set rules and motion trajectory, it is judged whether the target satisfies the condition for triggering the alarm.
Target Tracking: In many surveillance scenarios, the camera is required to move with the moving target to prevent the target motion from exceeding the camera's field of view, thus requiring the pan/tilt to move with the target's motion. In this design, only multi-target tracking can be converted to single-target tracking in this case. At present, there are many methods for image tracking, and related tracking is a commonly used, effective and fast target tracking method. In this paper, the improved multi-template matching method is used to track the target, and the multi-sub-template matching [4] and the binarization information are used to continuously correct the template. The template update problem caused by the template sliding is effectively solved. The similarity of the relationship number metric template; in order to overcome the occlusion problem and improve the accuracy and real-time of the tracking, the Kalman filter is used to estimate the motion state of the target [5], which effectively reduces the search range of the target. The target has a small change in motion state per unit time (the interval of this paper is 3 frames). It can be considered that the target is moving at a uniform speed during the unit time interval, and the Kalman filter model can be established. The observation vector is the position of the target after the template matching operation. The state vector is the actual position of the target and the current horizontal and vertical velocity. In order to improve the calculation speed, the Kalman prediction is performed on the horizontal position and the vertical position respectively.
2.2 Software Flow The video monitoring processing flow of BF561 is shown in Figure 3. First, BF561 receives the image of 1 frame transmitted from the FPGA, then BF561 reads the binarization information of the image of the frame, and obtains the size, center of gravity and position of the moving target of the current frame through the corrosion expansion function and the connected domain function target_mark(). The information is then updated by the target_update() function, and the region-based algorithm is used to determine the direction and distance of the centroid displacement of the moving object between successive frames, to determine the state of the target, and to determine that the new target, the original target, and the target occur. Consolidation, occlusion of targets, and loss of targets. After completing the update of the target chain, enter the rule detection function rule_check(), and judge whether the target in the target chain satisfies the alarm condition according to the trajectory information of the target. If the alarm condition is met, various alarm signals are given, and if not, return, Wait for the next loop. Through the recording of the motion track of the object, it is possible to realize the functions of intrusion detection, statistics of people and vehicles, detection of legacy objects, illegal occlusion of the camera and shifting alarms. To track the target in real time, enter the target_track() function, use the Kalman filter to predict the target position and improve the multi-sub-template matching algorithm to obtain the actual position of the target, and control the continuous tracking of the target of the gimbal motion. The experimental results are shown in Figure 4, indicating that the design can track targets accurately and in real time.

This design implements an intelligent video monitor. Its independent hardware design structure and rich interface make this platform not only can be used to intelligentize the current monitoring system, but also can independently build a new networked and intelligent monitoring system.
references
[1] Analog Device. ADSP-BF561 processor hardware refefence [EB/OL]. [2008-02-05] http://
[2] Peng Zheng, Zhu Xiuchang. Implementation of XGA video coding on dual-core DSP BF-561 [J]. Television Technology, 2009, 33(1): 32-34.
[3] STAUFFER C, GRIMSON W. Adaptive background mixture models for real-time tracking. In: Proc [C]. IEEE Conference on Computer Vision and Pattern Recognition, Fort Collins, Colrado, 1999: 246-252.
[4] Xiong Xujie. Improvement of image correlation tracking algorithm [D]. Wuhan: Huazhong University of Science and Technology, 2007: 21-32.
[5] Sun Haiyan, Fu Desheng. Multi-target tracking technology in video surveillance system [J]. Computer Applications and Software, 2005 (11): 22-23.