Interface circuit and driver based on ADC081S051 and 51 single chip microcomputer

introduction

The signal that exists in nature is usually an analog signal. In the measurement and control system, the collected analog signal is usually digitized and then handed over to a microprocessor or microcontroller for processing. Therefore, the analog-to-digital converter becomes an indispensable part of the measurement and control system. The ADC081S051 analog-to-digital converter is a low-power, single-channel CMOS 8-bit A/D converter from National Semiconductor that uses a serial peripheral interface for data output. Unlike conventional devices, the sampling rate of conventional devices is fixed, while the sampling rate of the ADC081S051 can be varied from 200 to 500 KSPS.

The data output of the ADC081S051 is a serial data output that is compatible with some standards such as SPI and QSPI. It operates from 2.7 to 5.25 V and can therefore be powered from a 3 V or 5 V supply. It can be used in portable systems, remote data acquisition, instrumentation and control systems. It has the advantages of small size, fast conversion speed and simple use.

1 ADC081S051 pin and function

The ADC081S051 is an 8-bit successive approximation analog-to-digital converter in a package of 6? Lead LLP package, pin diagram shown in Figure 1. A brief breakdown of the function of the pins is given below.

ADC081S051 pin diagram

VA: Positive power supply pin, usually connected to +5 V or +3 V.

GND: Positive power ground and signal ground VIN: Analog signal input pin, the signal varies from 0 to VA.

SCLK: Digital clock signal input that directly controls the conversion and output process.

SDATA: Digital signal output, output sample is locked on the falling edge of the SCLK pin.

CS-: Chip selection, starting a conversion process on the falling edge.

2 How to use ADC081S051

2.1 Design of sampling amplifier circuit

The analog signal output by the sensor is generally weak. The signal must be amplified by the amplifier, then sent to the A/D converter for analog-to-digital conversion, and finally processed by the processor.

Figure 2 is a practical sampling and amplifying circuit. It consists of a two-stage amplifying circuit. The first stage amplifying circuit uses an AD620AN amplifier, and the second stage uses an OP07 amplifier. The output signal of the sensor is connected to the 2nd and 3rd pins of the AD620AN amplifier. The differential input is used. The AD620AN has a very high input impedance, which has excellent suppression of voltage offset, temperature drift and common mode signal. The amplification factor of AD620AN Determined by resistor R1. The signal amplified by the AD620AN is sent to the non-inverting input terminal of the second-stage amplifying circuit OP07 for amplification by two RC first-order low-pass filters.

The second stage amplifying circuit has a zeroing and amplifying function. The amplified signal is passed through an RC first-order low-pass filter and input to the ADC081S051 analog signal input pin VIN for analog-to-digital conversion.

2.2 Conversion process

The serial interface timing diagram of the ADC081S051 is shown in Figure 3. After power-up, chip select CS must transition from high to low to begin a working process. When CS goes from high to low, it initiates a conversion process and data transfer. On the falling edge of CS, the SDATA pin is off high impedance, the converter transitions from sample mode to hold mode, and the sampled data is serialized one bit at a time from the SDATA pin on the falling edge of the clock pulse with the addition of the SCLK clock pulse. Output. On the rising edge of the 13th pulse of SCLK, the converter transitions from hold mode to sample mode. After the 16th falling edge of SCLK or on the rising edge of CS, the SDATA pin returns to the high-impedance state. After a conversion process is completed, a certain amount of idle time must be met before CS can be turned low to start another conversion process to ensure that the next conversion is working properly. To read a complete sample of data from the ADC081S051, 16 SCLK clock pulses must be added between the falling edge and the rising edge of CS, otherwise the data read is invalid. The data format output from the SDATA pin is 3 leading 0 bits, followed by 8 data bits, followed by 8 tail bits followed by 4 tail 0 bits.

Sampling amplification circuit diagram

Serial interface timing diagram

3 ADC081S051 interface and acquisition program with 51 series MCU

The currently used 51 series MCUs usually do not have an SPI hardware interface. In order to connect a MCU without an SPI hardware interface to the ADC081S051, the parallel port and software functions can be used to implement the SPI function. Its hardware interface is shown in Figure 4.

Interface schematic diagram of ADC081S051 and 51 series MCU

The following is an A/D conversion program written in C51, where ad_data is the sampled value.

A/D conversion program written in C51
A/D conversion program written in C51

4 Conclusion

This paper introduces the main features, working principle and application of ADC081S051. Because ADC081S051 has the advantages of low power consumption, fast sampling and conversion speed, simple use, etc., it can be widely used in measurement and control systems, portable systems, etc. This design has been verified by practice and performance. reliable.

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