Take you to know TI's DSP entry chip TMS320F28335

As an electronic hardware engineer, how can I not understand DSP, or some of our students have not understood the DSP a lot. Let us introduce a DSP entry chip today, from TI's TMS320F28335. I believe that I have seen the contents of this series, and everyone will have a preliminary understanding of DSP.

Introduction to TMS320F28335:

The TMS320F28335 is available in a 176-pin LQFP quadrilateral package. See the references for their functional structure. Its main performance is as follows:

High-performance static CMOS technology with an instruction cycle of 6.67 ns and a main frequency of 150 MHz;

High-performance 32-bit CPU, single-precision floating-point arithmetic unit (FPU), adopts Harvard pipeline structure, can quickly execute interrupt response, and has a unified memory management mode, which can realize complex mathematical algorithms in C/C++ language;

6 channel DMA controller;

On-chip 256 Kxl6 flash memory, 34 Kxl6 SARAM memory. 1 Kx16 OTPROM and 8 Kxl6 Boot ROM. Among them, Flash, OTPROM, 16 Kxl6 SARAM are password protected;

The control clock system has an on-chip oscillator, a watchdog module, supports dynamic PLL adjustment, an internal programmable phase-locked loop, and changes the input clock frequency of the CPU by setting the value of the corresponding register through software;

There are 8 external interrupts, and there is no dedicated interrupt pin for the DSP of the TMS320F281X series. GPI00~GPI063 are connected to this interrupt. GPI00-GPI031 is connected to XINTl, XINT2 and XNMI external interrupt, GPl032~GPI063 is connected to XINT3-XINT7 external interrupt;

Peripheral Interrupt Expansion Controller (PIE) supporting 58 peripheral interrupts, managing interrupt requests caused by on-chip peripherals and external pins;

Enhanced Peripheral Module: 18 PWM outputs with 6 high resolution Pulse Width Modulation Modules (HRPWM), 6 Event Capture Inputs, 2 Channel Quadrature Modulation Module (QEP);

Three 32-bit timers, Timer 0 and Timer 1 are used as general timers, Timer 0 is connected to the PIE module, Timer 1 is connected to the interrupt INTl3, and Timer 2 is used for the DSP/BIOS on-chip real-time system. , connected to the interrupt INTl4, if the system does not use DSP / BIOS, Timer 2 can be used for general timers;

The serial peripheral is a 2-channel CAN module, a 3-channel SCI module, two McBSP (multi-channel buffer serial interface) modules, one SPI module, and one I2C master-slave compatible serial bus interface module;

The 12-bit A/D converter has 16 conversion channels, 2 sample-and-holders, internal and external reference voltages, and a conversion speed of 80 ns, while supporting multi-channel conversion;

88 programmable multiplexed GPIO pins;

Low power mode

1.9 V core, 3.3 VI/O power supply;

The on-chip scan emulation interface (JTAG) conforms to the IEEEll49.1 standard; the memory map of the TMS320F28335 needs to be noted as follows:

The on-chip peripheral register blocks 0~3 can only be used in the data memory area, and the user cannot write programs in this memory area.

The OTP ROM area (0x38 0000~0x38 03FF) is a read-only space that stores the calibration program of the A/D converter. The user cannot write programs to this space.

Even if the eCAN module is not applied, the clock module should be enabled to use the RAM space allocated for eCAN as general RAM.

If the security code is set, the memory area Ox33FF80~0x33FFF5 needs to write all data 0x0000, but cannot be used to store programs or data. Conversely, 0x33FF80~Ox33FEF can store data or programs, of which 0x33FFF0~Ox33FFF5 can only store data.

Simulation tools and development environment:

TMS320F28335 development tools are: standard optimized C / C + + compiler / assembly / connector, CCS integrated development environment, evaluation board and XDS510 emulator. CCS is an integrated development platform with friendly interface and complete functions. It has editing, assembly, compilation, software and hardware simulation debugging functions.

ADC of the TMS320F28335:

The TMS320F28335 has a 16-channel, 12-bit analog-to-digital converter ADC. It can be configured as two independent 8-channel input modes, or it can be set to a 16-channel cascaded input mode by configuring AdcRegs.ADCTRL1.bit.SEQ_CASC=1. The input can be set to sequential acquisition by configuring AdcRegs.ADCTRL1.bit.ACQ_PS=1. That is, from the low channel to the end of the high channel. It is worth noting that the on-chip ADC has an input voltage range of 0--3V. Once it exceeds 3V, the on-chip ADC module will be burned. DATASHEET on TI introduces the accuracy of its ADC to 12 bits, which can't be achieved. After testing, we estimate that the best time to reach 11 is not bad. Let us briefly introduce the principle of the ADC module. The digital value is calculated by the following company, where 3 in the formula is the on-chip reference voltage Digital Value=4096*(Input Analog Voltage-ADCLO)/3; (when 0 V "input "3 V). The ADC can be divided into two modules SEQ1 and SEQ2, wherein SEQ1 includes ADCIN00--ADCIN07; SEQ2 includes ADCIN08--ADCIN15. The SEQ1 module can be started by software, PWM, external interrupt pin, and SEQ2 cannot be started by an external interrupt pin. In addition, the ADC can exchange data with the DMA.

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