Design and application of Blackfin processor in industrial image processing

Because processors (PCs) offer low-cost, small-size, scalable image processing systems, they are more attractive than other similar systems that consume more power and are more expensive. The company's processor family clock frequency includes an enhanced structure that facilitates efficient data movement and processing. This architecture is similar to a dual-multiply accumulator unit that provides a high-speed parallel interface for video and data channels. Some common algorithms for image processing and video processing are described below to illustrate how these features of the processor can play a role in today's image processing systems.

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1Blackfin processor has many features suitable for image applications

2Blackfin processor has two output points in one cycle because it has two units, which is equivalent to one × convolution per cycle.

As shown in Figure 1, the level close to the kernel processor is the fastest, but usually the capacity is too small without a large image cache. This is one of the reasons why direct memory access is so important. In this mode, the data frame can store and retrieve data from the fast memory, while data from the video peripherals is loaded into a larger buffer outside the chip. The controller operates independently of the core processor, while the core cycle is only used to provide an interrupt when the transfer is complete. Each of the algorithms described below takes advantage of some of the framework types based on which to achieve the best possible performance. These algorithms were chosen because they are suitable for a wide range of applications.

3× convolution

3 × mask, but the mask can not be too small, otherwise it will not be able to detect the edge of an image.

2 shows a matrix: an input matrix, an x ​​mask matrix and an output matrix. By appropriately inputting data thereto, the unit of the processor can process two output points at a time in one processor cycle while reading a plurality of data executed in parallel with the operation. This approach allows for efficient calculation of double output points per cycle or per pixel cycle.

The 3× convolution kernel approaches the horizontal and vertical edges. The first matrix detects changes in the vertical edges, while the second matrix detects changes in the horizontal edges.

The Blackfin processor uses a method that preserves the larger of the two gradients of the x pixel image, processing a frame approximately, and it uses a two-dimensional data frame based to access data from the fast processor memory.

Several features of the Blackfin processor

On a Blackfin processor, even if the processor has a level channel, the processing of a pre-branch can be as small as one cycle. This is quite impressive for processors with signal processing capabilities, and this obviously helps to reduce the computation time in this case.

The Blackfin processor signal processing function can perform two multiplication operations in one cycle while accessing the memory read accumulation table value twice. It turns out that this method can do a good job of the fixed-point Hough transform, and the effect is equivalent to floating-point calculation.

// loop over the values

A0 += a1; // add the results

The Blackfin processor provides a vector instruction to find two maxima from two operand pairs. This processing method can effectively find a N

In addition to the MAC and arithmetic logic units, the processor has four additionals that can be applied to single-cycle instructions. These four can process four sets of bytes at the same time, such as add, delete, and average. Very useful in estimating motion between image frames.

The 8-bit subtraction absolute value accumulation instruction subtracts four pairs of values, takes the absolute value of each difference, and accumulates each result into an accumulator to discriminate the motion of the object. In summary, the processor has a variety of methods for efficiently detecting motion of adjacent image frames.

FFT

(FFT) is a fast algorithm for computing discrete Fourier transforms. When calculating two-dimensional data, its main uses include fast convolution filtering, fast correlation, image enhancement, and object recognition. × The two-dimensional size of the image should also be ×. Its twiddle factor is usually calculated before the run time.

The FFT algorithm performs bit reversal and butterfly addition and subtraction instructions for efficient operations. In order to complete the two-dimensional bit inversion, the × input image is expanded into a one-dimensional vector of size 2, mainly because the transposed matrix generated by the bit-reversed one-dimensional vector is equal to the two-dimensional bit inversion.

The number of cycles required for 16× synthetic two-dimensional is the inclusion of overhead. This code can actually be used to calculate real numbers by setting the imaginary part of the input array element to zero. For more efficient real-numbered execution methods using complex codes, the two real matrices can be packed into a complex input of a complex two-dimensional. This method, called "packaging and dispensing" or "mass production", requires back-end processing to separate the output and requires two images to transform. But this is usually not a problem in fast convolution and fast correlation, because both transformations always need to be calculated.

The architecture of the Blackfin processor helps make it a very useful processor in industrial image processing systems. In addition, the company offers a common "image processing toolbox" core for processor-based image processing and analysis. The latest samples - the integration of Ethernet, controllers and interfaces on a single chip, enhance peripheral functions, and the addition of these tools will greatly expand the range of industrial image processing applications.

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