Achronix's world's first 22nm FPGA, targeting the high-end communications market
Intel officially released the Ivy Bridge processor on April 23. Ivy Bridge is Intel's first 22nm process processor built on a revolutionary tri-gate 3D transistor process. Followed by the US FPGA manufacturer Achronix announced the release of the world's first 22nm process of the new Speedster22i series FPGA products.
The industry has been very curious since Intel came out to start the latest process foundry business. Quietly, Intel's foundry business is growing. At least three vendors have adopted their new 22nm technology: FPGA vendor Archronix, Tabula, and stream processor vendor Netronome. The latest FPGA products released by Archronix are packaged by Intel, including wafer manufacturing, IP, packaging, and testing, which makes people think about the relationship between the two. Mr. Robert Blake, CEO of Archronix, answered this question: The two are close partners and it is not convenient to disclose more details.
The Speedster 22i from Archronix includes HD (high-capacity) and HP (high-performance) product lines for high-end communications and test applications. Both enjoy the same hard IP and IO architecture. The difference is that the HD series uses the same synchronization technology as most FPGA vendors for high-end communication and optical networking. The HP series uses proprietary asynchronous technology. For high-end markets that require powerful computing power.
HD Series FPGAs are a family of synchronization-based FPGA products that combine the highest density FPGA with the lowest power consumption. There are four members in the HD series, the largest of which has 1.7 million active lookup tables and 144Mb of embedded RAM. In addition, with up to 16 28Gbps high-speed transceivers (SerDes), 64 12.75Gbps SerDes and 960 universal 2.133Gbps I/Os, the HD Series offers the industry's highest I/O bandwidth. The key to high-end switches and bridging applications. The HD1000 engineering samples are expected to be shipped in the third quarter of this year.
The HP family of FPGA products leverages Achronix's patented picoPIPE custom clock architecture and can run at up to 1.5GHz, three to four times faster than synchronous FPGAs. The Speedster22i HP FPGA product is designed for maximum performance in feedforward data streams and DSP applications. The HP family has two products, the largest of which has 250,000 lookup tables and 64Mb of embedded RAM. HP's engineering samples are expected to be available in the first quarter of next year.
Three strategic advantages of Archronix FPGA
At present, the primary challenge faced by FPGA designers is how to meet the power requirements. The manufacturing process is from 65nm to 40nm, and then to 28nm. The device density and performance are slow to improve, while (static and dynamic) power consumption is growing rapidly. The appeal is very high.
Intel's latest 22nm process, compared to the 28nm process, can improve performance by nearly 40% and power consumption by 50% for a single transistor. Archronix CEO Robert Blake said: "By using Intel's latest 22nm process, combined with Archronix's core architecture and embedded hard IP technology, it can achieve half the power consumption and half the cost of the market competitive products. Together with design tools and software, developers can get their products to market quickly."
The use of the latest technology to reduce power costs is one of its advantages, the second is to launch targeted application FPGA products for specific areas. Most typical FPGA products are aimed at the general market, with high performance, high programmability, and the same price. ASSP and ASIC products for specific application areas, although relatively cheap, have a single function and are not capable of programming.
Archronix's FPGA products are targeted at specific areas of the world. Compared to general-purpose FPGAs, the Speedster 22i has built-in embedded hard IP, including a complete I/O protocol stack for 10/40/100G, Interlaken, and PCI Express gen1. /2/3 and memory controller for 2.133Gbps DDR3. In other FPGAs, these functions are implemented by programmable arrays, and embedded hard IP consumes 90% less power than the same function in a programmable FPGA architecture; compared to ASSP, ASIC products, Speedster22i With programmable capabilities, designers add different features as needed. More importantly, these embedded hard IPs eliminate the need for soft core IP costs for purchasing, integrating, and testing these features.
When it comes to the specific application market, Archronix CEO Robert Blake said: "By 2014, the global high-end FPGA market will be at least $3 billion, and the ASSP and ASIC markets will be around $11 billion. The market demand for high-end FPGAs is very impressive, especially It is the eye-catching performance of the Chinese market. He also said that China has now become the world's largest high-end FPGA market, and its market size has surpassed that of Japan and Europe. The market that Archronix focuses on is mainly the high-end communications market.
The third advantage is to provide the best hard IP technology and design tools. As mentioned earlier, some embedded hard IPs are built for specific application markets: Ethernet MAC, 100G Interlaken, PCI Express, DDR3 controllers. Traditional FPGA products need to be programmed to make timing closure challenging and require up to 500,000 equivalent look-up tables (LUTs) in a programmable array. This adds significant cost and power to traditional FPGA designs, and they are basic connections in Speedster FPGA products.
At the same time, Achronix provides proven software design support. Both the HD and HP series offer easy-to-use ACE design software version 4.2, which is available now. ACE is an FPGA design tool built on the industry standard Eclipse platform open source platform, making ACE easy for engineers who have used any other design tool built on the Eclipse platform. It is currently used by more than 500 licensors and supports both Windows and Linux versions.
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